Professor at Department of Information Technology, Division of Computer Systems
- +4618-471 2974
- Mobile phone:
- +46 70 4250394
- Visiting address:
- hus 10, Lägerhyddsvägen 1
- Postal address:
- Box 337
751 05 UPPSALA
IEEE Fellow, for contributions to high-performance and power-efficient memory hierarchies.
I am currently developing novel techniques and approaches in several computer architecture areas: non-speculative architectures to reduce the reliance on speculation while maintaining performance benefits; security at the architectural level; memory systems and memory hierarchies for novel computing paradigms.
Stefanos Kaxiras, IEEE Fellow, is Professor at Uppsala University, Sweden. He holds a PhD degree in Computer Science from the University of Wisconsin. In 1998, he joined the Computing Sciences Center at Bell Labs (Lucent) and later Agere Systems. In 2003 he joined the faculty of the ECE Department of the University of Patras, Greece and in 2010 became a full professor at Uppsala University, Sweden. Kaxiras’ research interests are in the areas of memory systems, and multiprocessor/multicore systems, with a focus on power efficiency. He has co-authored more than 90 research papers and 18 US patents, received three Swedish VR grants (main PI of a VR-Frame grant), participated in six major European research projects, and currently receives funding from Sweden’s business incubator and innovation agency VINNOVA. He is Fellow of the IEEE (for contributions to high-performance and power-efficient memory hierarchies) and ACM Distinguished Scientist.
IEEE Fellow (2021)
ACM Distinguished Scientist (2009)
Research Interests & Contributions: Memory Systems (Highly-Scalable Cache Coherence, VIPS & Racer, Cache Management using Reuse Distances), Power (Cache Decay), Instruction-based prediction, Network processors (IPStash IP-Lookup memories), Memory/Processor Integration (Datascalar/Distributed Vector Architectures)
My most cited contribution, with Margaret Martonosi, is Cache Decay.
It is the most cited paper (by a wide margin) of ISCA 2001 (755 citations as of Apr. 2016):
I am currently working on VIPS coherence (12 papers in the period 2012-2016) with Alberto Ros and on Decoupled Access-Execute with Alexandra Jimborean. We have expanded into software distributed shared memory for HPC and Big Data with Kostis Sagonas.
Eta Scale manages distribution and dissemination of our research results: VIPS, ArgoDSM, and the DAE (Decoupled Access-Execute) compiler tools (Daedal).
Recent papers (2015-2016)
Check here for my 2017 papers (2 CGO papers accepted)
1. M. F. Gonzalez-Zalba, F. Remacle, R.D. Levine, S. Rogge, S. Kaxiras, M. Sanquer, "Single Electron Devices and Circuits." ICT-Energy Letters, 2016.
2. Alberto Ros and Stefanos Kaxiras, "Racer: TSO Consistency via Race Detection." To appear: MICRO, 2016.
3. Alberto Ros, Carl Leonardsson, Chris Sakalis, and Stefanos Kaxiras, "POSTER: Efficient Self-Invalidation/Self-Downgrade for Critical Sections with Relaxed Semantics." To appear: PACT, 2016.
4. Parosh Aziz Abdulla, Mohamed Faouzi Atig, Stefanos Kaxiras, Carl Leonardsson, Alberto Ros and Yunyun Zhu, "Fencing Programs with Self-Invalidation and Self-Downgrade." 11th International Federated Conference on Distributed Computing Techniques, FORTE, 2016. '''Best Paper Award.'''
5. Magnus Själander, Gustaf Borgström, Stefanos Kaxiras, Mykhailo V. Klymenko and Françoise Remacle, "Techniques for Modulating Error Resilience in Emerging Multi-Value Technologies." ACM International Conference on Computing Frontiers, 2016.
6. Christos Sakalis, Alberto Ros, Carl Leonardsson, Stefanos Kaxiras, "Splash-3: A Properly Synchronized Benchmark Suite for Contemporary Research." In IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS), 2016. '''Open Source Software.'''
7. Konstantinos Koukos, Per Ekemark, Georgios Zacharopoulos, Vasileios Spiliopoulos, Stefanos Kaxiras, Alexandra Jimborean, "Multiversioned decoupled access-execute: the key to energy-efficient compilation of general-purpose programs." International Symposium on Compiler Construction, 2016. '''Best Paper Award.'''
8. T. Voigt, M. Själander, Frederik Hermans, Alexandra Jimborean, Erik Hagersten, Per Gunningberg, and Stefanos Kaxiras, "Poster: Approximation: A New Paradigm also for Wireless Sensing." Proceedings of the International Conference on Embedded Wireless Systems and Networks (EWSN), Graz, Austria, 15-17 Feb. 2016.
9. Jonatan Waern, Per Ekemark, Konstantinos Koukos, Stefanos Kaxiras and Alexandra Jimborean, "Profiling-Assisted Decoupled Access-Execute." HIP3ES: High Performance Energy Efficient Embedded Systems, 2016.
10. M. Själander, G. Borgström, and S. Kaxiras, "Improving Error-Resilience of Emerging Multi-Value Technologies." Workshop On Approximate Computing (WAPCO), 20 Jan. 2016.
11. Konstantinos Koukos, Alberto Ros, Erik Hagersten, Stefanos Kaxiras, "Building Heterogeneous Unified Virtual Memories (UVMs) without the Overhead." ACM Transactions on Architecture and Code Optimization (TACO), 2016. 13(1):1-22. DOI: 10.1145/2889488
1. Mahdad Davari, A. Ros, E. Hagersten, S. Kaxiras, "An Efficient, Self-Contained, On-Chip Directory: DIR1-SISD." In IEEE Computer Society Parallel Architectures and Compilation Techniques (PACT), (pp. 317-330), 2015.
2. S. Kaxiras, D. Klaftenegger, M. Norgren, K. Sagonas, "Turning Centralized Coherence and Distributed Critical-Section Execution on their Head: A New Approach for Scalable Distributed Shared Memory." 24th ACM International Symposium on High-Performance Parallel and Distributed Computing (HPDC-24), 2015. '''Nominated for Best Paper Award (1 out of 4 top papers).''' '''Open Source Software.'''
3. T. Carlson, S. Kaxiras, W. Heirman, L. Eeckhout, "The Load-Slice Core Microarchitecture." 42th International Symposium on Computer Architecture (ISCA-42) 2015.
4. A. Ros, S. Kaxiras, "Callback: Efficient Synchronization without Invalidation with a Directory Just for Spin-Waiting." 42th International Symposium on Computer Architecture (ISCA-42) 2015.
5. A. Ros, M. Davari, S. Kaxiras, "Hierarchical private/shared classification: The key to simple and efficient coherence for clustered cache hierarchies." IEEE 21st High Performance Computer Architecture (HPCA-21), 2015.
6. A. Ros, S. Kaxiras, "Fast&Furious: A Tool for Detecting Covert Racing" PARMA-DITAM '15 6th Workshop on Parallel Programming and Run-Time Management Techniques for Many-core Architectures and 4th Workshop on Design Tools and Architectures for Multicore Embedded Computing Platforms, 2015.
7. Andreas Sandberg, Nikos Nikoleris, Trevor E. Carlson, Erik Hagersten, Stefanos Kaxiras, David Black-Schaffer "Full Speed Ahead: Detailed Architectural Simulation at Near-Native Speed." IEEE International Symposium on Workload Characterization IISWC, 2015: 183-192.
8. Mahdad Davari, Alberto Ros, Erik Hagersten, Stefanos Kaxiras, "The Effects of Granularity and Adaptivity on Private/Shared Classification for Coherence." ACM Transactions on Architecture and Code Optimization (TACO), 2015.
== Book: ==
NEW! Our new book is out: "Power-Efficient Computer Architectures: Recent Advances" Paperback, Morgan and Claypool Publishers, January 1, 2015
by Magnus Sjalander, Margaret Martonosi, Stefanos Kaxiras.
Computer Architecture Techniques for Power-Efficiency
Stefanos Kaxiras and Margaret Martonosi
Synthesis Lectures on Computer Architecture
* Mark D. Hill Series Editor
* Paperback: 220 pages
* Publisher: Morgan and Claypool Publishers; 1 edition (June 13, 2008)
* ISBN-10: 1598292080 ISBN-13: 978-1598292084
Mahdad Davari: Multicore Coherence
Mehdi Alipur: Efficient cores
Magnus Norgren: Software Coherence
Nikos Nikoleris: Cache modeling, fast simulation
Ricardo Alves: Cache management
David Klaftenegger: Efficient synchronization
Vasileios Spiliopoulos: Power, DVFS modeling, Power Tools, Cache management for power
Konstantinos Koukos: Decoupled Access Execute, GPU Coherence
Georgios Keramidas (TEI Messolonghi, Greece)
Pavlos Petoumenos (Research Associate, University of Edinburgh)
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