Uppsala University Department of Information Technology

Technical Report 2004-005

Evaluation, Implementation and Performance of Write Permission Caching in the DSZOOM System

Håkan Zeffer, Zoran Radovic, Oskar Grenholm, and Erik Hagersten

February 2004


Fine-grained software-based distributed shared memory (SW-DSM) systems typically maintain coherence with in-line checking code at load and store operations to shared memory. The instrumentation overhead of this added checking code can be severe.

This paper (1) shows that most of the instrumentation overhead in the fine-grained DSZOOM SW-DSM system is store related, (2) introduces a new write permission cache (WPC) technique that exploits spatial store locality and batches coherence actions at runtime, (3) evaluates WPC and (4) presents WPC results when implemented in a real SW-DSM system. On average, the WPC reduces the store instrumentation overhead in DSZOOM with 42 (67) percent for benchmarks compiled with maximum (minimum) compiler optimizations.

Note: Updated June 2004

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