Cache resizing and DVFS are two well-known techniques, employed to reduce leakage and dynamic power consumption respectively. Although extensively studied, these techniques have not been explored in combination. In this work we argue that optimal frequency and cache size are highly affected by each other, therefore should be studied together.
We present a framework that drives DVFS and Cache Resizing decisions in a unified, co-ordinated way. We show that MLP is the key to understand how performance is affected by both techniques and we develop an analytical model to quantify performance variation under different cache sizes and core frequencies. Finally, we expose this information to the OS and/or the application, which are responsible for setting core frequency and cache size based on energy-efficiency policies defined by the user.
Our experimental results show that our model can drive DVFS and Cache Resizing decisions to reduce dynamic and static energy consumption and improve EDP by 18% on average for SPEC2006. We evaluate different policies and showcase that with our model, it is trivial to build any policy involving energy-performance requirements.
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