Department of Information Technology

Swedish Workshop on Multi-Core Computing, MCC09

Program

Thursday, November 26

09.00 Registration at Ångströmlaboratory, Polhemsalen.

09.55 Welcome address Presentation

Paper Session 1

Chair: Bengt Jonsson
10.00 Anastasia Stulova, Jianjiang Ceng, Weihua Sheng, Jeronimo Castrillon and Rainer Laupers. A Co-simulation Framework for MPSoC Run-Time Behavior Analysis in Early System Design Presentation
10.25 Andreas Sandberg and Stefanos Kaxiras. Efficient detection of communication in multi-cores Presentation
10.50 Carl Christian Rolf and Krzysztof Kuchcinski. Parallel Consistency in Constraint Programming Presentation
11.15 Break
11.30 Giorgio Delzanno, Frédéric Haziza and Ahmed Rezine. Constrained Monotonic Abstraction: a CEGAR for Parameterized Verification Presentation
11.55 Ke Jiang and Bengt Jonsson. Using SPIN to Model Check Concurrent Algorithms, using a translation from C to Promela Presentation

12.20 Lunch at Rullan

Keynote session

Chair: Philippas Tsigas
13.40 Keynote speaker: Tim Harris Microsoft, Cambridge, UK Making sense of transactional memory Presentation in pdf, Presentation in pptx with animations
14.30 Break

Paper Session 2

Chair: Håkan Grahn
15.00 Bao Yan and Mats Brorsson. An Implementation of Cache-Coherence for the Nios II Soft-core Processor Presentation

15.25 David Black-Schaffer and William Dally. Simplifying 2D Stream Programming for Real-Time Processing

15.50 Magnus Gustafsson and Sverker Holmgren. Efficient implementation of a high-dimensional PDE-solver on multicore processors Presentation
16.15 Break
16.20 Artur Podobas and Mats Brorsson. A Comparison of some recent Task-based Parallel Programming Models Presentation
16.45 Karl-Filip Faxen. Efficient work stealing for fine-grained parallelism Presentation
17.10 Keynote speaker: Jakob Engblom, Virtutech AB The Pain and the Gain of Multicore (from a Simulator Perspective) Presentation
18.00 Nan Guan, Martin Stigge and Wang Yi. Fixed Priority Multiprocessor Scheduling with Liu & Layland´s Utilization Bound Presentation
18.25 End of session

20.00 Dinner at Il Forno Italiano

Friday, November 27

Paper session 3

Chair: Elisabeth Larsson
08.30 Konstantin Popov. A Framework for Modeling Large Stream-Processing Systems on MultiCore Processors Presentation
08.55 Mathieu Desnoyers, Michel Dagenais and Dominique Toupin. Highly-Scalable Wait-Free Buffering Scheme for Multi-Core System Tracing Presentation
09.20 Keynote speaker: Andras Vajda, Ericsson AB. The multi-core challenge: an Ericsson perspective
10.10 Break

Paper Session 4

Chair: Erik Hagersten
10.30 George Russell, Uwe Dolinsky, Andrew Richards and Alastair Donaldson. Offloading Code to Heterogeneous Multi-core Presentation
10.55 Daniel Cederman, Tayyab Chaudhry and Philippas Tsigas. Towards a Software Transactional Memory for CUDA Presentation
11.20 Håkan Sundell and Philippas Tsigas. Brushing the Locks out of the Fur: A Lock-Free Work Stealing Library Based on Wool Presentation
11.45 Tomas Nordström, Göran Ökvist and Mikael Isaksson. VDSL2 Multi-Processor System-on-Chip

12.10 Lunch at Rullan

Paper Session 5

Chair: Mats Brorsson
13.15 Nan Guan, Martin Stigge and Wang Yi. Cache-Aware Scheduling and Analysis for Multi-cores
13.40 Zain Ul-Abdin and Bertil Svensson. High-level Programming for Specifying Run-time Reconfiguration in Processor Arrays Presentation
14.05 Break
14.20 Jan Kasper Martinsen and Håkan Grahn. Thread-Level Speculation for Web Applications Presentation
14.45 Muneeb Khan and Erik Hagersten. Optimization Study for Multicores Presentation
15.10 End of MCC09 Presentation

15.20 Business meeting for the network "Swedish Multicore Initiative" in Fakultetsrummet at Ångströmlab.

Updated  2009-12-07 13:14:35 by Roland Grönroos.