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Power dissipation has become an important design constraint, on par with performance, in the design of every computer system. It has also been a major factor behind the switch to multicore architectures. Over the past decade a large number of power optimizations have been proposed but it is becoming exceedingly difficult to evaluate them in the context of multicores. Typically, simulation has been used for this job, but it is now too slow to capture the complex interaction of power optimizations in such an environment. We are developing techniques based on a new class of analytical modeling called interval modeling and extend it to describe many important power optimizations. In addition, we are developing techniques to accurately measure power of real processors at a very fine time resolution. Using interval-based power models, statistical approaches to describe the dynamic behavior of programs, and real power measurements allows us to explore a vast design space in terms of power-efficiency. We aim to use this exploration to tailor multicore power management facilities individually to each application, and to optimize applications at the source code level for power-efficiency.
Interval-based models to describe DVFS. Loss of performance is due to "miss events." Out of many types of miss events the last level cache misses, i.e., accesses to the slow main memory, are the ones that can be affected by frequency scaling.
Applying the models on real applications yields near-optimal frequencies for power-efficiency metrics (EDP and ED2P). We are currently performing this dynamically at run time by continuously predicting optimal frequency and voltage.
An enabling methodology that allows us to apply our theoretical models on real machines are the accurate, high-resolution, fine-grain, power measurements on real systems. The picture shows our power measurement probes directly on the voltage regulators of an Intel i7 motherboard.
Develop power consumption models and apply them to dynamically optimize the power efficiency of multicores, GPGPUs and memory systems, both for stand-alone systems and for large-scale clusters (warehouse computing, data centers, cloud computing, HPC).
Analytical models for power consumption that can effectively drive the power management of multicores.
Interval-based DVFS model that describes a change of operating frequency as a change of the memory latency in cycles. Application on real systems.
Vasilis Spiliopoulos, Stefanos Kaxiras, Georgios Keramidas "Green Governors: A Framework for Continuously Adaptive DVFS," 2nd International Green Computing Conference, Orlando, Florida, USA, July 25-28, 2011.
Juan M. Cebrián, Juan L. Aragón and Stefanos Kaxiras "Power Token Balancing: Adapting CMPs to Power Constraints
for Parallel Multithreaded Workloads," IEEE Parallel and Distributed Processing Conference (IPDPS), May 16-20, 2011.
Juan M. Cebrián, Juan L. Aragón and Stefanos Kaxiras "Token3D: Reducing Temperature in 3D die-stacked CMPs
through Cycle-level Power Control Mechanisms," EuroPar, 2011.
Vasileios Spiliopoulos, Georgios Keramidas, Stefanos Kaxiras and Konstantinos Efstathiou "DVFS Management in Real-Processors" (Poster) International Conference on Supercomputing, 2011.
Senior: Stefanos Kaxiras (Contact)
Ph.D. students: Vasileios Spiliopoulos
Konstantinos Koukos
M.Sc. Students: Siddharth Mondal
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