Professor at Department of Information Technology, Division of Computer Systems
- +4618-471 6830
- Mobile phone:
- +46 76 8242017
- Visiting address:
POL 105165 hus 10, Lägerhyddsvägen 1
- Postal address:
- Box 337
751 05 UPPSALA
My research focuses on approaches for moving data more efficiently in computer systems, using both software and hardware techniques. Our results have been commercialized through a startup and incorporated in industry standards. Prior to joining Uppsala, I contributed to the OpenCL standard for heterogeneous computation while working at Apple, Inc. I have received multiple awards for my teaching, and lead a startup that helped over 80,000 students.
Keywords: performance computer architecture memory systems simulation runtimes scheduling efficiency active teaching commercialization
I received my PhD in Electrical Engineering from Stanford University in 2008. My PhD thesis was on programming for real-time embedded processing on many-core processors in the Concurrent VLSI Architecture Group working with William Dally. After my PhD I worked at Apple on the development of the first OpenCL implementation for heterogeneous parallel processing across CPUs and GPUs, and then as a postdoc researcher in computer architecture in the Dept. of Information Technology at Uppsala University. I was appointed assistant professor in 2010 in the architecture research group at Uppsala looking at parallel programming systems and optimizations as part of the UPMARC research center. I received the docent title in 2014 and a promotion to full professor in 2017.
At Uppsala University, I was the Research Responsible Professor for the Computer Architecture and Communications Systems program from 2020-2022, the head of the Division of Computer Systems from 2022, and the department representative to the faculty Advisory Committee for Research since 2021.
I have been very active in flipped-classroom teaching. In particular, I lead the ScalableLearning project from 2012-2020, which developed an online system to support at-home and in-class flipped classroom teaching used by over 80,000 students. My active teaching techniques have been recognized by the Uppsala Engineering and Science Student Union Pedagogical Prize (2012), the Uppsala University Pedagogical Prize (2016), and the Uppsala Technical Physics Students' Teaching Award (2019).
I have also worked to bring my research results into industry, both through startups and industrial collaboration. Together with my colleague Erik Hagersten, we commercialized our new power-efficient memory system designs, resulting in their being acquired by a major international corporation. I have also worked with my colleague Chang Hyun Park and collaborators at Arm Ltd., in the UK, to get our memory system designs into the specification for future Arm processors.
Grants and Awards
- Knut and Alice Wallenberg Foundation, Wallenberg Academy Fellowship Prolongation (2020-2025)
- Swedish Research Council (VR) Project Grant (2019-2024)
- European Research Council ERC Starting Grant (2017-2022)
- Uppsala University Pedaogical Prize (2016)
- Swedish Foundation for Strategic Research (SSF), Smart Systems Framework Grant (Co-PI, 2016-2021) Automating System SpEcific Model-Based LEarning (ASSEMBLE)
- Knut and Alice Wallenberg Foundation, Wallenberg Academy Fellow (2016-2021)
- Swedish Research Council (VR), Young Researcher Project Grant (2015-2018)
- Swedish Foundation for Strategic Research (SSF), Future Research Leaders (2013-2018)
- EU FP7, Addressing Energy in Parallel Technologies (Co-PI 2013-2016)
- Uppsala University, Pedagogical Development Grant for Flipped Classroom (2013)
- Swedish Research Council (VR), Framework Grant (Co-PI, 2012-2017)
- Uppsala Union of Engineering and Science Students, Teaching Award (2012)
- Stanford University, Centennial Teaching Assistant Award (2004)
- Stanford University, Hugh Hildreth Skilling Teaching Assistant Award (2003)
Computer Architecture 1 (To view the interactive online course lectures, register at ScalableLearning and join with the enrollment key YRLRX-25436.)
- Sample: Introduction to Digital Logic Design (88 minutes)
- Sample: Introduction to Virtual Memory (70 min)
Parallel Programming for Efficiency (MSc level)
- Sample: Power and Energy in Computer Systems (52 min)
- Introduction to Computer Architecture Research (PhD level)
- Predicting Next-Generation Multicore Performance in a Fraction of a Second (Keynote, SICS Multicore Day, 2015)
- GPUs: The Hype, The Reality, and the Future (Keynote, SICS Multicore Day, 2013) PDF (2011)
- Flipped Classroom Teaching in an Introductory CS Course (KTH, 2013) PDF
- Resource Sharing in Multicore Processors (Keynote, Ericsson Software Research Day 2011)
- Introduction to OpenCL PDF
- Optimizing OpenCL PDF
- GPU Architectures for Non-Graphics People PDF
This paragraph is not available in English, therefore the Swedish version is shown.
My research focuses on improving efficiency in computers by making the memory system more intelligent. Our work includes more clever ways of moving and placing data in the memory system, integrating data movement with the processor core itself, adapting runtime schedules for better data movement, and the analysis and modeling of data movement.
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