Power-Aware Resource Management for LTE Base Stations

Magnus Själander, Post-doc, Florida State University

Monday, May 20th, 2013 at 10:15.

Polacksbacken, room 1212

With the proliferation of mobile phones and other mobile internet appliances, the application area of baseband processing continues to grow in importance. The number of mobile broadband subscribers has exploded in recent years with a 93% year-on-year growth in March 2009 and a 30% increase in worldwide mobile data bandwidth usage for the second quarter of 2009 alone. To meet the increasing demand of cellular and mobile broadband the number of base stations increased with 14% in 2011. Baseband stations for Long Term Evolution (LTE) communication processing tend to rely on over-provisioned resources to ensure that peak demands can be met. This over-provisioning causes high-power consumption, which in turn constitutes more than half of the total cost of ownership for a base station. This talk presents an open-source LTE benchmark with a realistic representation of the baseband processing of an LTE base station, and demonstrates its usefulness in investigating resource management strategies to conserve power on a multi-core processor. By estimating the workload of each LTE subframe and using these estimates to control power-gating, the power consumption is reduced by more than 24% (11% on average) compared to executing the benchmark with no estimation-guided resource management.

Magnus Själander is a Research Scientist at Florida State University. He received both his Ph.D. degree (2008) and Lic.Eng. degree (2008) in Computer Engineering from Chalmers University of Technology, Sweden and the M.S. degree (2003) in Computer Science and Engineering from Luleå University of Technology, Sweden. He has been a research intern at NXP Semiconductors, worked at Aeroflex Gaisler, and been a Research Associate at Chalmers University of Technology. He has co-authored one book-chapter and more than 30 technical papers in various conferences and journals. Själander's research interests include energy-efficient computing, high-performance and low-power digital circuits, micro-architecture and memory-system design, and hardware-software interaction. He is currently working on energy-efficient memory hierarchies and the instruction set architecture of a new processor design.