Department of Information Technology

Coloring the caches for predictability on multicores

Speaker

Wang Yi

Date and Time

Thursday, September 24th, 2009 at 13.30

Location

Polacksbaken, room 1146

Abstract

The major obstacle to use multicores for real-time applications is that we may not predict and provide any guarantee on real-time properties of embedded software on such platforms; the way of handling the on-chip shared resources such as L2 cache may have a significant impact on the timing predictability.

In this talk, we will try to motivate the technical challenges in this research area. As a potential solution, we propose to use cache space isolation techniques to avoid cache contention for hard realtime tasks running on multicores with shared caches. We present a scheduling strategy for real-time tasks with both timing and cache space constraints, which allows each task to use a fixed number of cache partitions, and makes sure that at any time a cache partition is occupied by at most one running task. In this way, the cache spaces of tasks are isolated at run-time, and the WCET of a task can be estimated using existing techniques for single processor systems, which can be used for system-level timing analysis.

As technical contributions, we have developed a sufficient schedulability test for non-preemptive fixed-priority scheduling for multicores with shared L2 cache, encoded as a linear programming problem. To evaluate the performance and scalability of our techniques, we use randomly generated task sets. Our experiments show that the test based on an LP-solver can easily handle task sets with thousands of tasks in minutes using a desktop computer.

We will also outline recent ideas for the multicore timing analysis when the bandwidth for memory access is involved.

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Updated  2009-09-16 08:19:47 by Frédéric Haziza.