Department of Information Technology


  • Michel Dubois is a Professor of Computer Engineering in the Department of Electrical Engineering at the University of Southern California. Before joining U.S.C. in 1984, he was a research engineer at the Central Research Laboratory of Thomson-CSF in Orsay, France. His area of expertise is in Computer Architecture and Parallel Processing. He is well known for his work on cache coherence and memory consistency models. From 1993 to 2001 he led the RPM Project. RPM stands for "Rapid Prototyping engine for Multiprocessors", an FPGA-based hardware platform to implement multiprocessor systems with different architectures. His current research interests are Chip Multiprocessors and the impact of technological trends on micro-architectures. Prof. Dubois holds a Ph.D. from Purdue University, an MS from the University of Minnesota, and an engineering degree from the Faculte Polytechnique de Mons in Belgium, all in Electrical Engineering. He is a fellow of the ACM and of the IEEE.
  • Peter J Eriksson
  • Babak Falsafi is a Professor in the School of Computer and Communication Sciences at EPFL, and an Adjunct Professor of Electrical and Computer Engineering and Computer Science at Carnegie Mellon. He is the Microarchitecture thrust leader for the FCRP Center for Circuit and System Solutions and directs the Parallel Systems Architecture Laboratory (PARSA) at EPFL. His research targets architectural support for parallel programming, resilient systems, architectures to break the memory wall, and analytic and simulation tools for computer system performance evaluation. In 1999, in collaboration with T. N. Vijaykumar he showed for the first time that multiprocessors do not need relaxed memory consistency models to achieve high performance. He is a recipient of an NSF CAREER award in 2000, IBM Faculty Partnership Awards between 2001 and 2004, and an Alfred P. Sloan Research Fellowship in 2004. He is a senior member of IEEE and ACM.
  • Suresh Jagannathan is a Professor of Computer Science and University Faculty Scholar at Purdue University. Prior to joining Purdue, he was a Senior Research Scientist at the NEC Research Institute. His interests are in programming languages and their implementation, static and dynamic analyses, concurrent and distributed systems, and software engineering. He has published widely in these areas, with over 100 publications in journals and refereed conferences. He received his MS and Ph.d from MIT, and his BS from SUNY Stony Brook.
  • Kunle Olukotun is a Professor of Electrical Engineering and Computer Science at Stanford University where he has been on the faculty since 1992. Olukotun has been a researcher in and proponent of chip multiprocessor technology since the mid 1990's. Olukotun is well known for leading the Stanford Hydra research project which developed one of the first chip multiprocessors with support for thread-level speculation (TLS). Olukotun founded Afara Websystems to develop high-throughput, low power server systems with chip multiprocessor technology. Afara was acquired by Sun Microsystems; the Afara microprocessor technology, called Niagara, is the basis of systems that have become one of Sun's fastest ramping products ever. Olukotun is actively involved in research in computer architecture, parallel programming environments and scalable parallel systems. Olukotun currently directs the Pervasive Parallelism Lab (PPL) which seeks to proliferate the use of parallelism in all application areas. Prof. Olukotun is an ACM Fellow and IEEE Fellow. He has authored many papers on CMP design and parallel software and recently completed a book on CMP architecture. Olukotun received his Ph.D. in Computer Engineering from The University of Michigan.
  • Joseph Sifakis is a CNRS researcher and the founder of Verimag laboratory, in Grenoble, France. He holds the INRIA-Schneider endowed industrial chair since September 1st 2008. He studied Electrical Engineering at the Technical University of Athens and Computer Science at the University of Grenoble. Verimag is a leading research laboratory in the area of critical embedded systems. It developed the underlying theory and technology for the SCADE tool, used by Airbus for the design and validation of its critical real-time systems, and is becoming a de facto standard for aeronautics. Verimag has a lasting and strategic collaboration with ST Microelectronics, France Telecom R&D, and Airbus, through which numerous results on validation and testing have been transferred. He is recognized for his pioneering work on both theoretical and practical aspects of Concurrent Systems Specification and Verification. He contributed to emergence of the area of model-checking, currently the most widely-used method for the verification of industrial applications. His current research activities include component-based design, modeling, and analysis of real-time systems with focus on correct-by-construction techniques. He has broad experience with industry, notably though joint projects with partners such as Astrium, the European Space Agency, France Telecom, ST Microelectronics and he has also been active for many years in consulting. He is the Scientific Coordinator of the European Network of Excellence ARTIST2 on Embedded Systems Design. This network gathers 35 of the best European teams in the area, and aims to produce innovative results for cost-effective design of dependable embedded systems. It will also promote innovative methods safe and secure systems, notably through cooperation with key European industrial partners such as Thalès, Airbus, Ericsson, Philips, and ST Microelectronics. He is the director of the CARNOT Institute "Intelligent Software and Systems" in Grenoble. He is a member of the editorial board of several journals, co-founder of the International Conference on Computer Aided Verification (CAV) and a member of the Steering Committee of the EMSOFT (Embedded Software) conference. He is a member of Academia Europea and a member of the French National Academy of Engineering.Prof. Sifakis has received with Ed Clarke and Allen Emerson for their contribution to Model Checking, the Turing Award for 2007. He is also the recipient of the CNRS Silver Medal in 2001.
  • Andras Vajda received his M.Sc. in Distributed Systems in 1997 at the Babes-Bolyai University of Cluj, Romania. He has been with Ericsson since 2001, working on the development and architecture of 3rd generation telecommunication nodes, notably RNC and Mobile Media Gateway, both massively parallel, multi-processor systems. More recently he has the responsibility for the parallel and cloud computing research within the software research group of Ericsson, with high focus on programming many-core chips.


Updated  2009-04-21 22:25:14 by Parosh Abdulla.